Research Bits: Apr. 6
Memristors: Reservoir computing; 2D bismuth selenide; thin-film hafnium oxide. The post Research Bits: Apr. 6 appeared first on Semiconductor Engineering .
Reservoir computing
Researchers from Loughborough University designed a memristor reservoir computing chip that can process data that changes over time directly in hardware.
“Inspired by the way the human brain forms very numerous and seemingly random neuronal connections between all its neurons, we created complex, random, physical connections in an artificial neural network by designing pores in nanometer-thin films of niobium oxide as part of a novel electronic device,” said Pavel Borisov, senior lecturer in physics at Loughborough University, in a press release. “We showed how one can predict the future evolution of a complex time series using these devices at up to two thousand-times lower energy consumption compared to a standard software-based solution.”
In tests, the model was able to use the memristor-processed data to successfully predict the short-term behavior of the Lorenz-63 system, a mathematical model of chaos where small changes can lead to very different outcomes, and reconstruct missing data. It also correctly identified pixelated numbers and carried out basic logic operations, showing that the same device can support a range of different tasks.
“The next steps are to increase the complexity of the neural networks and to conduct tests with input data that include much more signal noise,” added Borisov. “We believe this is a scalable and practical approach to creating small, industry-compatible devices for AI applications with much better energy efficiency and offline capabilities.” [1]
Bismuth selenide memristor
Researchers from the University of Michigan built a memristor made from 2D layers of bismuth selenide (Bi2Se3) in an Au/Bi2Se3/Ti stack that combines long-term data retention with analog tuning without requiring external circuit regulators.
The memristor was constructed by layering 500nm-wide gold bottom electrodes on top of a 300nm-thick silicon dioxide base. Bi2Se3 flakes made up of a few stacked 2D layers were then grown directly on the gold electrodes through physical vapor deposition. The gold both serves as an electrode and helps control nucleation and grain size of Bi2Se3, ensuring site-specific growth. Titanium and additional gold layers were deposited perpendicular to the bottom electrode to make a lattice with an Au/Bi2Se3/Ti sandwich at the points of intersection.
Elemental analysis and simulations showed that gold filaments extend upward from the bottom electrode into the Bi2Se3 layer when voltage is applied, growing and contracting without bridging the gap to the top electrode, thereby providing smooth analog tuning of the device conductance. The lattice structure formed by the crossbar array facilitated in-memory computing by hosting dynamic growth and retraction of gold filaments, which continuously modulate device resistance.
The Bi2Se3 memristors showed analog conductance tuning of 10%-40% and stable retention with less than 1% loss over 10,000 seconds. In a demonstration, the memristor successfully controlled a balance lever while using just 7 microwatts as part of a fully analog, all-hardware reservoir computing network. [2]
Thin-film hafnium oxide
Researchers from the University of Cambridge, Beijing Institute of Technology, and Lund University built a highly stable, low‑energy hafnium oxide memristor.
The thin-film memristor was grown using a two‑step method that added strontium and titanium to the hafnium oxide, forming p-n junctions inside the oxide where the layers meet and allowing the device to change its resistance smoothly by shifting the height of an energy barrier at the interface, rather than by growing or rupturing the filaments.
“Filamentary devices suffer from random behavior. But because our devices switch at the interface, they show outstanding uniformity from cycle to cycle and from device to device,” said Babak Bakhit, from Cambridge’s Department of Materials Science and Metallurgy, in a statement. However, he noted that the current fabrication process requires temperatures of around 700°C. “This is currently the main challenge in our device fabrication process. But we’re now working on ways to bring the temperature down to make it more compatible with standard industry processes. If we can reduce the temperature and put these devices onto a chip, it would be a major step forward.” [3]
References
[1] J. Donald, B. A. Johnson, A. Mehrnejat, et al. Scalable Platform Enabling Reservoir Computing With Nanoporous Oxide Memristors for Image Recognition and Time Series Prediction. Advanced Intelligent Systems 2026, 0, e202500833. https://doi.org/10.1002/aisy.202500833
[2] S. J. Ki, S. Lee, X. An, et al. Analog-Tunable Nonvolatile Regulator-Free Memristors for Neuromorphic Controlling. ACS Nano 2026 20 (8), 6798-6807 https://doi.org/10.1021/acsnano.5c16447
[3] B. Bakhit, X. Xie, S. M. Fairclough, et al. HfO2-based memristive synapses with asymmetrically extended p-n heterointerfaces for highly energy-efficient neuromorphic hardware. Sci. Adv. 12, eaec2324 (2026). https://doi.org/10.1126/sciadv.aec2324
Jesse Allen
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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.
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