Chip Industry Week In Review
Tighter restrictions on DUV litho; Arm-IBM dual-architecture deal; power device trio; Intel takes full control of Irish fab; 1.4nm AI chip; data center heat islands; 300mm fab equipment spending; 67k IC jobs unfilled; HBF wins over GPU; NIST's photonic chip packaging; USC's new memory; virtual process simulation for automotive. The post Chip Industry Week In Review appeared first on Semiconductor Engineering .
Tighter restrictions on DUV litho; Arm-IBM dual-architecture deal; power device trio; Intel takes full control of Irish fab; 1.4nm AI chip; data center heat islands; 300mm fab equipment spending; 67k IC jobs unfilled; HBF wins over GPU; NIST’s photonic chip packaging; USC’s new memory; virtual process simulation for automotive.
Deals
-
IBM and Arm are collaborating on a new dual‑architecture hardware aimed at enterprise AI and data-intensive workloads, using virtualization to boost reliability, security, scalability, and software compatibility. The goal, according to an IBM spokesperson, is to deliver side-by-side deployments of S390x-Linux and Arm-Linux virtual machines in a single kernel-based hypervisor.
-
Nvidia and Marvell partnered to bring the latter’s XPUs and other technology into Nvidia’s AI factory and AI-RAN ecosystem, as well as collaborate on photonics. Nvidia also invested $2B in Marvell.
-
Toshiba, ROHM, Mitsubishi Electric, and other partners agreed to start discussions on a potential merger of their power device businesses.
Tighter export restrictions
- Export controls on semiconductor manufacturing equipment, particularly restrictions on EUV litho and etch/deposition equipment, are slowing China’s advanced AI capabilities, but China is finding ways to circumvent some of them, reports IAPS. Now lawmakers are pushing for even more stringent rules via the proposed MATCH Act, including restrictions on DUV and etch tools. The rules would apply to the U.S. and allied countries.
War impacts
- The Iran war is causing supply chain shortages and higher costs for the chip industry. Impacted are higher tungsten prices, ~$3,000 per MTU this week (versus ~$900 in January); disrupted helium supplies; higher energy prices for the Asia fabs, and longer lead times and higher costs for naphtha, a critical chemical for chip fabrication.
Advanced nodes
-
Intel is spending $14.2B to repurchase Apollo’s 49% equity interest in Intel’s Ireland Fab34. The fab uses the Intel 4 and Intel 3 process technologies.
-
TSMC received government approval this week to deploy its 3nm chips at its second fab in Kumamoto, Japan, with production expected in 2028.
-
Fujitsu is developing a 1.4nm AI chip, teaming up with Rapidus for manufacturing, reports Nikkei Asia.
-
Rapidus’ 2nm mass production is expected in the latter half of 2027, and the company is aiming to close the gap on 1nm with TSMC, reports Nikkei xTech.
-
Yet, designing, developing, and manufacturing chips at 2nm and below requires a whole new set of business and technology tradeoffs that are dramatically more impactful at every turn, from architectural inception to manufacturing yield.
Research
-
Cambridge-led researchers found that data centers are causing a “data heat island effect,” warming the area within several kilometers around AI hyperscalers. The study points to some solutions.
-
An MIT AI model that was trained on 2,000 different semiconductor materials can detect six different atomic defects.
Reports
-
IDC expects the Foundry 2.0 market, which is comprised of pure-play foundry, non-memory IDM, OSAT, and photomask fabrication, will hit US$360B in 2026, a 17% annual increase.
-
SEMI predicts global 300mm fab equipment spending will climb 18% in 2026 to $133B, 14% in 2027, mostly driven by sub-2nm and memory capacity investments.
Fig. 1: 300mm fab outlook. Source: SEMI
Quick links to more news:
Global In-Depth Reports and Deals Security Vehicles, Batteries Research Quantum Events and Further Reading
Global
Americas
-
SIA’s workforce policy blueprint predicts that 60% of new IC manufacturing jobs will not require a 4-year college degree, and 67,000 new jobs in manufacturing and design will go unfilled in 2030.
-
The US Chip Security Act legislation, which would require location verification on advanced AI chips and other safeguards, advanced through a key House committee, coming on the heels of the chip smuggling charges.
-
Siemens appointed Ann Fairchild as president and CEO of Siemens USA. She has served as interim president and CEO since October 2025.
Asia
-
KAIST professor Kim Jeong-ho, known as the “father of HBM,” predicts “that the ultimate winner of the AI era would be memory, not the GPU,” reports Aju Business Daily, with high-bandwidth flash to dominate.
-
Sony has suspended orders for its digital imaging products due to the ongoing memory shortage.
-
Nexchip, China’s 3rd largest chip foundry, filed on the HK listing, looking to expand capacity for its mature process nodes.
-
New providers of glass materials used for semiconductors are coming soon in Japan, including Nippon Electric Glass, AGC, and Asahi Kasei, providing relief to tight supplies.
Europe
-
Luc Van den hove reflected on his career path at imec, as he steps into his role as chairman this week, with Patrick Vandenameele assuming the CEO position.
-
As part of a new £10M program, the UK’s Univ. of Warwick and Univ. of Southampton are exploring new ways to grow TMDCs, 2D semiconductor materials for ultra-low-power electronics, neuromorphic computing, photonic circuits, and quantum technologies.
Reports and Deals
Fundings, M&A
-
Rebellions raised $400M in its latest round for its AI inference infrastructure.
-
Cognichip raised $60M Series A for AI-enabled chip design, and Intel CEO Lip-Bu Tan joined the board.
-
Amphenol released details of its open offer for ADC India Communications.
-
PrismML emerged from stealth with a commercially viable 1-bit LLM, built on research developed at Caltech.
Reports
-
Global DRAM and HBM Market Share (Counterpoint)
-
MLPerf inference benchmark results (MLCommons)
-
Top 10 Global Fabless IC Firms in 2025 (TrendForce)
-
Hybrid Bonding Expands from Logic to Memory (Counterpoint)
Opinions
-
How high can memory prices go (J Handy, Objective Analysis)
-
The next era of semiconductor value creation (McKinsey)
-
The Institute Behind Taiwan’s Chip Dominance (Asterisk)
-
When do more AI chips for China mean fewer for the US (IFP)
-
Canadian digital sovereignty depends on semiconductors (MLI)
-
Capacity, geography, and rise of advanced nodes in the semi industry (Yole)
-
Hyperscale AI Data Centers Spurs Opposition (Harvard)
-
Empty national AI policy framework (Brookings)
Research
Using hydroxide catalysis bonding, NIST-led scientists designed a photonic chip packaging method that could withstand extreme temperatures and radiation, while achieving reliable optical performance.
Fig. 2: Illustration of a photonic IC, with components bonded using a technique that enables the circuit to survive and operate in extreme environments. Credit: NIST
Researchers at Rochester’s RF Analog Mixed Signal Laboratory developed an adaptive analog chip that lets power delivery circuits dynamically respond to real-world variability, improving ultra-low power low-dropout (LDO) regulator design.
By accident, USC researchers discovered a new type of memory that functioned well at 700°C, with tungsten as a top layer, hafnium oxide ceramic in the middle, and graphene on the bottom layer.
More research
-
Agent Factories for HLS (IBM)
-
High-power ring laser frequency-modulated combs (Harvard, TU Wien)
-
The heterogeneous integration of electronic components (Intel)
Security
Growing Threats
-
Mariners face growing challenges due to maritime GPS jamming and spoofing cyberattacks, particularly now in the Iran War, with the shipping sector left vulnerable due to their almost exclusive reliance on electronics, reports Georgia Tech.
-
In the automotive and aerospace sectors, the flip of a tiny bit can bring down even the best-architected and most secure systems of systems, and despite decades of awareness, there still is no easy way to stop it.
-
Chip designers’ most urgent security challenges are no longer abstract quantum-secure algorithm choices or late-stage feature additions. They are architectural decisions that must be made early, under real constraints of area, power, performance, cost, with long product lifetimes.
New Alerts and Leaks
-
Nvidia announced two high-severity security bulletins, one on Jetson and IGX Devices, and the other on BioNeMo Framework.
-
Anthropic accidentally leaked the source code of Claude AI after unintentionally revealing a new AI model called Mythos.
-
Microsoft issued a statement regarding a new danger to WhatsApp users. Messages can now be used to spread malicious VBS files that can take control of Windows.
-
Android announced a new developer verification rollout to combat bad actors who are releasing dangerous apps.
-
A security “blind spot” has been found in Google Cloud’s Vertex AI that could potentially let other harmful AI agents gain unauthorized access to data and the cloud environment.
-
Proofpoint announced that a hacker group out of China, TA416, has resumed targeting European government agencies with malware attacks.
-
CISA added new additions to its Known Exploited Vulnerabilities catalog.
Security Research
-
Cross-Component Rowhammer Attacks from Modern GPUs (UNC, MBZUAI, Georgia Tech)
-
Leveraging HW Performance Counters for Control Flow Attestation
-
Digital Twins for Hazard-Resilient Power Grids (Northumbria, Durham)
-
Securing Elliptic Curve Cryptocurrencies against Quantum Vulnerabilities (Google, Berkeley et al.)
Vehicles, Batteries
New technology
-
Keysight announced a new virtual process simulation solution to help automotive and industrial manufacturers identify assembly issues before they become too costly.
-
Siemens has signed a letter of intent with the European Space Agency to provide digital twin capabilities and a digital engineering and simulation backbone.
-
ROHM added CMOS operational amplifiers that target automotive and other systems.
-
ST introduced a low-resistance MOSFET to save energy and PCB area in the power distribution and battery management systems of automotive vehicles.
Global auto news
-
Baidu robotaxis trapped passengers and caused accidents in China after a suspected system failure hit dozens of vehicles.
-
Grab, the Asian ‘Super App,’ will partner with WeRide to launch autonomous public rides in Singapore, where the vehicles will operate on strict schedules and routes.
-
Nissan Americas’ chairman said that affordable vehicles are unable to be built in the U.S., and that they can only be made in Mexico.
-
Honda is moving several thousand engineers from automotive development into R&D to help fight against rising Chinese rivals.
Batteries
-
Managing power is a key concern for all devices that run on a battery, whether it’s to extend an electric vehicle’s range, a robot’s capacity to work, or a consumer device’s time without charge. Battery management technology is well established, but there are ongoing innovations to fine-tune systems and eke out ever greater efficiency.
-
Thermal runaway is a major safety hurdle for lithium-ion batteries. USTC dives into the mechanisms, modeling techniques and mitigation strategies for thermal runaway propagation.
Automotive Technical Papers
-
Reliability of WBG Semiconductors for Auto Applications (U. Bremen et al.)
-
High Quality Datasets for ML Applications from Closed-Loop Data Collection (FZI)
-
Vision-Geometry-Action Model for Autonomous Driving at Scale (Tsinghua U., Xiaomi et al.)
-
Acceptance and tolerance of discretionary actions performed by AVs (Cardiff U. et al.)
Quantum
IBM and ETH Zurich announced a 10-year collaboration to advance next-gen algorithms for AI and quantum computing.
Quantum funding
-
Alice & Bob was awarded $3.9M from the U.S. government to use quantum computing to develop rare-earth-free magnets.
-
IQM raised €50M to scale operations and accelerate product development of its superconducting quantum computers and processors (QPUs).
Quantum research/reports
-
Caltech researchers and others found that useful quantum computers can be built, and Shor’s algorithm can be executed, with as few as 10,000 reconfigurable atomic qubits, which is far fewer than previously thought.
-
QuiX Quantum demonstrated below-threshold error mitigation in photonic quantum computing, suppressing physical qubit errors to the level compatible with scalable, fault‑tolerant quantum computing.
-
In a step towards more portable, scalable quantum computers, UMass Amherst and UCSB engineers shrunk quantum hardware by using small photonic chips instead of large precision lasers.
-
Small business programs are effective tools for addressing quantum commercialization and supply chain growth, according to CSIS.
Trending Video
How AI Will Automate Chip Design: Step-by-step application of AI in EDA. Ziyad Hanna, corporate VP at Cadence, talks about five levels of autonomy in chip design that mirror those in the automotive industry, what agentic AI can do, and new challenges involving traceability and explainability.
Events and Further Reading
Upcoming webinars are here, including:
-
Autonomous Vehicle Simulation (AVxcelerate) What’s New, Apr. 7
-
HBM4E Advances Bandwidth Performance for AI Training, Apr. 8
-
Co-Intelligence: The New Architecture of Semiconductor Ecosystems, Apr. 8 – 10
-
Accelerating Automotive Design: Real-Time Simulation for Early Concept Validation, Apr. 8
Find upcoming chip industry events here, including:
EVENTS Date Location
SPIE Photonics Europe Apr 12 – 16 Strasbourg, France
Computational Optics Apr 12 – 16 Strasbourg, France
Cadence Live Silicon Valley Apr 15 – 16 Santa Clara, CA
IEEE Custom Integrated Circuits Conference (CICC) Apr 19 – 22 Seattle, WA
Design, Automation and Test in Europe Conference Apr 20 – 22 Verona, Italy
ISIG Executive Summit USA Apr 20 – 21 Silicon Valley
2026 MRS Spring Meeting & Exhibit Apr 26 – May 1 Honolulu, Hawaii
Siemens User2User North America Apr 28 Santa Clara, CA
SEMIEXPO Heartland 2026 Apr 29 – 30 Detroit, Michigan
Display Week May 3 – 8 Los Angeles
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) May 4 – 7 Washington D.C.
SEMICON Southeast Asia 2026 May 5 – 7 Kuala Lumpur, Malaysia
CadenceCONNECT: Tech Days Europe 2026 May 6 Munich
IEEE International Memory Workshop May 10 – 13 Leuven, Belgium
ASMC: Advanced Semiconductor Manufacturing Conference May 11 – 14 Albany, New York
Embedded Vision Summit May 11 – 13 Santa Clara, CA
Siemens User2User Europe May 12 Munich, Germany
CadenceCONNECT: Tech Days Europe 2026 May 12 Edinburgh
VOICE 2026 Developer Conference May 18 -20 Scottsdale, Arizona
Surface Preparation and Cleaning Conference (SPCC) May 18 – 20 Chandler, AZ
Electronic Components and Technology Conference (ECTC) May 26 – 29 Orlando, Florida
Hardwear.io Security Trainings and Conference USA 2026 May 26 – 30 Santa Clara, CA
Find all events here.
Sign in to highlight and annotate this article

Conversation starters
Daily AI Digest
Get the top 5 AI stories delivered to your inbox every morning.
More about
reviewrestrict![[P] GPU friendly lossless 12-bit BF16 format with 0.03% escape rate and 1 integer ADD decode works for AMD & NVIDIA](https://preview.redd.it/qbx94xeeo2tg1.png?width=140&height=93&auto=webp&s=39ed7f02dad84ccf081f932903c016c7983d4fcd)
[P] GPU friendly lossless 12-bit BF16 format with 0.03% escape rate and 1 integer ADD decode works for AMD & NVIDIA
Hi everyone, I am from Australia : ) I just released a new research prototype It’s a lossless BF16 compression format that stores weights in 12 bits by replacing the 8-bit exponent with a 4-bit group code . For 99.97% of weights , decoding is just one integer ADD . Byte-aligned split storage: true 12-bit per weight, no 16-bit padding waste, and zero HBM read amplification. Yes 12 bit not 11 bit !! The main idea was not just “compress weights more”, but to make the format GPU-friendly enough to use directly during inference : sign + mantissa: exactly 1 byte per element group: two nibbles packed into exactly 1 byte too https://preview.redd.it/qbx94xeeo2tg1.png?width=1536 format=png auto=webp s=831da49f6b1729bd0a0e2d1f075786274e5a7398 1.33x smaller than BF16 Fixed-rate 12-bit per weight , no
Knowledge Map
Connected Articles — Knowledge Graph
This article is connected to other articles through shared AI topics and tags.
More in Products

Tried Designing a 8 bytes PDAP BINARY based on JSON 404 and TOON 171, T-TOON 130 and A TOKENIZED T-TOON 112 not sure if it works in Real World Applications?
TOTAL: 8 bytes, zero parsing overhead ``` **What we eliminated:** Field names (`“disk”`, `“byte”`, `“value”`) Length prefixes Token tables / dictionaries Schema metadata Repetition & redundancy **What we kept:** Fixed positional meaning (byte 0 = disk0, byte 1 = disk1, etc.) Pre-agreed protocol between sender/receiver Direct memory mapping → CPU can load in 1–2 instructions -– ## Working Code: PDAP Binary Encoder/Decoder (JavaScript) ```javascript // PDAP Binary: 8-byte ultra-compact format class PDAPBinary { // Encode: 32-bit value + 4 disk bytes → 8-byte Buffer static encode(value32, diskBytes) { if (diskBytes.length !== 4) throw new Error(‘Exactly 4 disk bytes required’); const buffer = Buffer.alloc(8); // Bytes 0-3: 32-bit value (big-endian) buffer.writeUInt32BE(value32 >>> 0, 0); // B






Discussion
Sign in to join the discussion
No comments yet — be the first to share your thoughts!